The present invention relates to semiconductor devices such as MOSFETs using trenches to establish electrical contact.
The conventional trench process for forming MOSFETs uses a total of six masks; i.e.,
1. a first mask for defining a buried layer region in a semiconductor; PA1 2. a second mask for defining an active area; PA1 3. a source mask for source implantation; PA1 4. a trench mask for defining the trench of etching and filling; PA1 5. a contact mask to define the areas of contacts; and PA1 6. a metal mask.
This process results in a relatively deep junction, wider cell pitch, wider source width and a stronger parasitic transistor problem.
Accordingly, it is an object of the present invention to provide a novel semiconductor structure made by a process which uses fewer masks.
It is another object of the present invention to provide a novel trench contact structure where the buried layer may selectively be controlled and made deeper than the depth of the trench gate.
It is yet another object of the present invention to provide novel structures for both trench and planar devices.
These and many other objects and advantages of the present invention will be readily apparent to one skilled in the art to which the invention pertains from a perusal of the claims, the appended drawings, and the following detailed description of the preferred embodiments.